The present invention relates to a resin-sealed semiconductor device such as an IC or an LSI and a method of manufacturing the same.
A resin-sealed semiconductor device comprises a semiconductor chip and a lead connected to the electrode of the semiconductor chip. The distal end of the lead and the semiconductor chip are sealed by a resin. The whole size of the resin-sealed semiconductor device including the sealing resin is determined by standards. And generally, the size of the semiconductor chip increases as the degree of integration of the circuit increases. When the semiconductor chip increases in size and when the distal end of the lead is arranged not to overlap the semiconductor chip, the length of a part of the lead fixed with the resin is shortened, and the lead cannot be rigidly fixed. Therefore, in this case, an LOC (Lead On Chip) type structure in which the distal end of the lead overlaps the semiconductor chip is generally employed.
Japanese Patent Application Laid-Open No. 61-218139 discloses an LOC type resin-sealed semiconductor device. In the structure disclosed in this publication, as shown in FIG. 5 of the present application, the distal end of a lead 1 is adhered to a semiconductor chip 3 through an insulating tape 4, and the distal end and an electrode 10 of the semiconductor chip 3 are connected to each other with a bonding wire 5. The semiconductor chip 3, the distal end of the lead 1, and the bonded portions are covered with the sealing resin layer 2.
The sealing resin layer 2 generally consists of an epoxy-based resin whose ratio by weight is about 20% and filler whose ratio by weight is about 80%. The filler is silica-based solid bodies each having a diameter of 50 to 100 xcexcm and has a function of keeping the hardness of a resin layer and a function of suppressing thermal expansion.
However, since the above insulating tape 4 easily absorbs moisture, the moisture contained in the insulating tape 4 is evaporated by heat generated in practical use. Forces generated in this case disadvantageously cause cracks 6 to form in the sealing resin layer 2, as shown in FIG. 6.
As shown in FIG. 7, if the large-diameter filler 7 clogs a gap of about 100 m between the lead 1 and the semiconductor chip 3, stress is generated between the lead 1 and the semiconductor chip 3 when the sealing resin layer 2 is solidified. The stress is generated due to the difference between the coefficient of contraction of the sealing resin layer 2 and that of the filler 7. This stress may cause flaws 8 such as cracks in the semiconductor chip 3.
The present invention aims to solve the problems of the prior art described above, and its object is to provide a resin-sealed semiconductor device which employs an LOC type structure, suppresses formation of cracks in a sealing resin layer by heat in practical use, and can prevent flaws or cracks from forming in a semiconductor chip during solidification of the sealing resin layer.
A resin-sealed semiconductor device according to the present invention comprises: a semiconductor chip having a circuit surface on which a plurality of electrodes are formed; a plurality of leads which are arranged at predetermined gaps with respect to the semiconductor chip in such a manner that distal ends of the leads overlap the semiconductor chip and are electrically connected to the respective electrodes; a lead fixing resin layer filled between the semiconductor chip and the leads to fix the leads to the semiconductor chip; and a sealing resin layer which is coated to cover the distal ends of the leads and the semiconductor chip, and when the lead fixing resin layer contains filler, the diameter of the filler is smaller than the diameter of filler contained in the sealing resin layer, or the lead fixing resin layer is free from filler.
When the lead fixing resin layer contains filler, the diameter of the filler is preferably about {fraction (1/10)} to ⅕ the diameter of the filler contained in the sealing resin layer, or the diameter is preferably about {fraction (1/10)} of a gap between the leads and the semiconductor chip at an overlapping portion therebetween, i.e., the diameter is preferably about 10 m. In addition, the percentage by weight of the filler contained in the lead fixing resin layer is preferably lower than the percentage by weight of the filler contained in the sealing resin layer.
A method of manufacturing a resin-sealed semiconductor device according to the present invention which is constituted by sealing a semiconductor chip and leads with a sealing resin layer, comprises: coating a lead fixing resin layer on a circuit surface of the semiconductor chip; fixing the distal ends of a plurality of leads to the semiconductor chip with the lead fixing resin layer; bonding the distal ends of the leads and electrodes formed on the circuit surface; and sealing the semiconductor chip and the leads with the sealing resin layer. The lead fixing resin layer contains filler having a diameter smaller than that of filler contained in the sealing resin layer, or is free from filler.